How to design a 4x4 RAM?

Question

I need a help in designing 4x4 RAM...Please kindly help me,..

Answer 1

That's 16 bits.

Using just LS type logic:

I/O:

Two address bits decoded into 4 addresses

four data input bits/lines, 2 data output lines

clock

clear

Use 16 LS74 sections for the latches.

The two address bits can be decoded via a 2-4 multiplexer like a LS157 into 4 address lines. These are used to gate the clock to the latches, in sets of vertical 4

You can connect the 4 data bits, each to 4 latches, and depend on the clock being gated by the LS157.

Outputs can be gated by the LS157 also.

Operation

1. set address lines and new data in to the data in lines

2. old data immediately appears at data out lines

3. hit clock

4. new data is latched into the latches

you need 16 LS74 sections, 1 LS157, 4 LS08 sections (clock gating)

1 LS08 to buffer clear signal.

But I need to draw it to be sure I didn't miss anything.